jfet-Biasing

Difference between jfet and bjt:

• Jfet is mostly used in switching operations while bjt is used for linear circuits.
• The voltage gain does not hold good for the fet ,however a bjt gives a fixed voltage gain depending on the configurtion.
• As we all know bjt is a current controlled device whereas fet is a voltage controlled device.The biasing methods of a fet are similr to those discussed in bjt biasing techniques.

Let us get to know them:

1.fixed bias:

The figure below shows the fixed bias configuration for a n type JFET. The circuit used for its dc analysis is shown below.
Applying KVL in the gate to source loop;
-Vgs-Vgg=0
therefore,Vgs=(-Vgg).

Since Vgg is having fixed value Vgs is also having a fixed value and hence the configuration is called as fixed bias.

The drain current Id can be calculated from shockley's equation:

Id=Idss(1-(Vgs/Vp))^2.
The other parameters can be also calculated as:
Vd=Vdd-Id*Rd.

Vgs=Vg-Vs.

and since source is grounded Vs=0.
Hence
Vgs=Vg.

also
Vds=Vd.

2.self bias:

The self bias configuration eliminates the need for two dc supplies.The controlling gate to source voltage is determined by resistor in the source leg.



Vrs=Id*Rs
since Id=Is
Using KVL
-Vgs-Vrs=0
Vgs=-Vrs


Also Id=Idss(1-(Vgs/Vp))^2
On substituting Vgs and solving further we get quadratic equation:
Id^2+K1*Id+K2=0.

which can be solved to find Id.


vds=vdd-Is*RD-Is*Rs
since Id=Is.

3.Voltage divider bias:

The voltage divider biasing configuration is similar to the network we had seen in transistor biasing.
The gate  voltage is dependent on both the resistor R2 and R1 in the network.




Vg=Vdd*(R2/(R2+R1))

Id=(Vg-Vgs)/Rs

Vds=Vdd-Id*Rd-Id*Rs

Since Id=Is.