counters

A counter circuit is usually constructed of a number of flip-flops connected in cascade. Counters are a very widely-used component in digital circuits, and are manufactured as separate integrated circuits and also incorporated as parts of larger integrated circuits.

In this blog we will deal with asynchronous ,synchronous counter and ring counter:
1.Asynchronous counter:
Depending on the number of digits to be counted modulo N counters are configured.

Cycle	Q1	Q0	(Q1:Q0)dec
0	0	0	0
1	0	1	1
2	1	0	2
3	1	1	3
4	0	0	0

Number of flip-flops are connected in series such that the clocks of the next flip flop is triggered by the input of previous fllip flop.

design of asynchronous counter:

1.decide the no of flip-flops from the mod number from the basic equation.

modulus n=2^n

where n is the no of flipflops.

2.connect the flip flops serially as a ripple counter

3.fimd the binary number n-1

4.connect all ff outputs that are 1 at n-1 as inputs to a NAND gate.Also feed the clock pulse to the NAND gate

5.connect the NAND gate output to the preset inputs of all the flip-flops for which Q=0 at the count n-1.

  

2.synchronous counters

In synchronous counters, the clock inputs of all the flip-flops are connected together and are triggered by the input pulses. Thus, all the flip-flops change state simultaneously (in parallel). The circuit below is a 4-bit synchronous counter. The J and K inputs of FF0 are connected to HIGH. FF1 has its J and K inputs connected to the output of FF0, and the J and K inputs of FF2 are connected to the output of an AND gate that is fed by the outputs of FF0 and FF1. A simple way of implementing the logic for each bit of an ascending counter (which is what is depicted in the image to the right) is for each bit to toggle when all of the less significant bits are at a logic high state. For example, bit 1 toggles when bit 0 is logic high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles when bit 2, bit 1 and bit 0 are all high; and so on.

Synchronous counters can also be implemented with hardware finite-state machines, which are more complex but allow for smoother, more stable transitions.

 3.ring counters

A ring counter is a circular shift register which is initiated such that only one of its flip-flops is the state one while others are in their zero states.

A ring counter is a Shift Register (a cascade connection of flip-flops) with the output of the last one connected to the input of the first, that is, in a ring. Typically, a pattern consisting of a single bit is circulated so the state repeats every n clock cycles if n flip-flops are used.